A semiconductor device for a power supply should preferably operate at a relatively high voltage, for example near a theoretical breakdown voltage. When an external device operating at a high voltage is controlled by an integrated circuit, a high-voltage control element may be required in the integrated circuit, and should be built to have a high breakdown voltage. Hence, when high voltage is applied directly to a drain or source of a transistor, a punch through voltage between the drain/source and a semiconductor substrate and a breakdown voltage between the drain/source and a well or a substrate may need to be greater than the high voltage.
Among various high-voltage semiconductor devices, a lateral diffused MOS (LDMOS) device, which may be one type of high-voltage MOS devices, may have a structure suitable for high voltages. A LDMOS may use a drift region to separate a channel region from a drain electrode, and may be controlled by a gate electrode.
A related art LDMOS device may have a source region and a drain region formed to have substantially equal heights on and/or over a semiconductor substrate. In addition, a Local Oxidation of Silicon (LOCOS) insulation film may be provided between the source region and the drain region.
Because a LOCOS insulation film may be formed at a certain depth in the semiconductor substrate, electrons traveling from a source region via a channel region may go under the LOCOS insulation film and move toward the drain region. Accordingly, in such a related art LDMOS device, a distance electrons need to travel may be relatively long, which may increase an on-resistance (Ron).